Sequential Equivalence Techniques for High Performance Design
Quite often in semiconductor industry, when a product is nearing its launch date, most of us have had the deja-vu situation of performance to time-to-market trade-offs; especially in high-performance designs. Sequential equivalence checking opens up possibilities in this area, by enabling performance-tuning related sequential micro-architectural changes to be verified with significantly lower impact on effort estimates and risk. This nascent technology promises to change the way we look at eleventh hour changes.
7th International Conference on ASIC, 2007. ASICON ’07.
10.1109/ICASIC.2007.4415840


